PTEC3552 VLSI and Chip Design Syllabus:

PTEC3552 VLSI and Chip Design Syllabus – Anna University Part time Regulation 2023

COURSE OBJECTIVES:

● Understand the fundamentals of IC technology components and their characteristics.
● Understand combinational logic circuits and design principles.
● Understand sequential logic circuits and clocking strategies.
● Understand ASIC Design functioning and design.
● Understand Memory Architecture and building blocks

UNIT I MOS TRANSISTOR PRINCIPLES

MOS logic families (NMOS and CMOS), Ideal and Non Ideal IV Characteristics, CMOS devices. MOS(FET) Transistor Characteristic under Static and Dynamic Conditions, Technology Scaling, power consumption

UNIT II COMBINATIONAL LOGIC CIRCUITS

Propagation Delays, stick diagram, Layout diagrams, Examples of combinational logic design, Elmore’s constant, Static Logic Gates,Dynamic Logic Gates, Pass Transistor Logic, Power Dissipation, Low Power Design principles.

UNIT III SEQUENTIAL LOGIC CIRCUITS AND CLOCKING STRATEGIES

Static Latches and Registers, Dynamic Latches and Registers, Pipelines, Nonbistable Sequential Circuits.Timing classification of Digital Systems, Synchronous Design, Self-Timed Circuit Design .

UNIT IV INTERCONNECT , MEMORY ARCHITECTURE AND ARITHMETIC CIRCUITS

Interconnect Parameters – Capacitance, Resistance, and Inductance, Electrical WireModels, Sequential digital circuits: adders, multipliers, comparators, shift registers. Logic Implementation using Programmable Devices (ROM, PLA, FPGA), Memory Architecture and Building Blocks,Memory Core and Memory Peripherals Circuitry

UNIT V ASIC DESIGN AND TESTING

Introduction to wafer to chip fabrication process flow. Microchip design process & issues in test and verification of complex chips, embedded cores and SOCs, Fault models, Test coding. ASIC Design Flow, Introduction to ASICs, Introduction to test benches, Writing test benches in Verilog HDL, Automatic test pattern generation, Design for testability, Scan design: Test interface and boundary scan.

TOTAL: 45 PERIODS
COURSE OUTCOMES:

Upon successful completion of the course the student will be able to
CO1: In depth knowledge of MOS technology
CO2: Understand Combinational Logic Circuits and Design Principles
CO3: Understand Sequential Logic Circuits and Clocking Strategies
CO4: Understand Memory architecture and building blocks
CO5: Understand the ASIC Design Process and Testing.

TEXTBOOKS

1. Jan D Rabaey, Anantha Chandrakasan, “ Digital Integrated Circuits: A Design Perspective”, PHI, 2016.(Units II, III and IV).
2. Neil H E Weste, Kamran Eshranghian, “ Principles of CMOS VLSI Design: A System Perspective,” Addison Wesley, 2009.( Units – I, IV).
3. Michael J Smith ,” Application Specific Integrated Circuits, Addison Wesley, (Unit – V)
4. Samir Palnitkar,” Verilog HDL:A guide to Digital Design and Synthesis”, Second Edition, Pearson Education,2003.(Unit – V)
5. Parag K.Lala,” Digital Circuit Testing and Testability”, Academic Press, 1997, (Unit – V)

REFERENCES

1. D.A. Hodges and H.G. Jackson, Analysis and Design of Digital Integrated Circuits, International Student Edition, McGraw Hill 1983
2. P. Rashinkar, Paterson and L. Singh, “System-on-a-Chip Verification-Methodology and Techniques”, Kluwer Academic Publishers,2001
3. SamihaMourad and YervantZorian, “Principles of Testing Electronic Systems”, Wiley 2000
4. M. Bushnell and V. D. Agarwal, “Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits”, Kluwer Academic Publishers,2000