PTCEC337 DSP Architecture and Programming Syllabus:

PTCEC337 DSP Architecture and Programming Syllabus – Anna University Part time Regulation 2023

COURSE OBJECTIVES:

● Study the architecture of programmable DSP processors
● Learn to implement various standard DSP algorithms in DSP Processors
● Use the Programmable DSP Processors to build real-time DSP systems

UNIT I ARCHITECTURES FOR PROGRAMMABLE DSP PROCESSORS

Basic Architectural features, DSP Computational building blocks, Bus architecture and memory, Data addressing capabilities, Address generation Unit, Programmability and program execution, Speed issues, Features for external interfacing

UNIT II TMS320C5X PROGRAMMABLE DSP PROCESSOR

Architecture of TMS320C54xx DSP processors, Addressing modes – Assembly language Instructions -Memory space, interrupts, and pipeline operation of TMS320C54xx DSP Processor, On-Chip peripherals, Block Diagram of TMS320C54xx DSP starter kit

UNIT III TMS320C6X PROGRAMMABLE DSP PROCESSOR

Commercial TI DSP processors, Architecture of TMS320C6x DSP Processor, Linear and Circular addressing modes, TMS320C6x Instruction Set, Assembler directives, Linear Assembly, Interrupts, Multichannel buffered serial ports, Block diagram of TMS320C67xx DSP Starter Kit and Support Tools

UNIT IV IMPLEMENTATION OF DSP ALGORITHMS

DSP Development system, On-chip, and On-board peripherals of C54xx and C67xx DSP development boards, Code Composer Studio (CCS) and support files, Implementation of Conventional FIR, IIR, and Adaptive filters in TMS320C54xx/TMS320C67xx DSP processors for real-time DSP applications, Implementation of FFT algorithm for frequency analysis in realtime.

UNIT V APPLICATIONS OF DSP PROCESSORS

Voice scrambling using filtering and modulation, Voice detection and reverse playback, Audio effects, Graphic Equalizer, Adaptive noise cancellation, DTMF signal detection, Speech thesis using LPC, Automatic speaker recognition

30 PERIODS
PRACTICAL EXERCISES: 30 PERIODS

1. Real-Time Sine Wave Generation
2. Programming examples using C, Assembly and linear assembly
3. Implementation of moving average filter
4. FIR implementation with a Pseudorandom noise sequence as input to a filter
5. Fixed point implementation of IIR filterHARDWARE & SOFTWARE SUPPORT TOOLS:
● TMS320C54xx/TMS320C67xx DSP Development board
● Code Composer Studio (CCS)
● Function Generator and Digital Storage Oscilloscope
● Microphone and speaker

TOTAL:60 PERIODS
COURSE OUTCOMES

At the end of this course, the students will be able to:
CO1: Understand the architectural features of DSP Processors.
CO2: Comprehend the organization of TMS320C54xx DSP processors
CO3: Build solutions using TMS320C6x DSP Processor
CO4: Implement DSP Algorithms
CO5: Study the applications of DSP Processors.

TEXT BOOKS

1. Avtar Singh and S. Srinivasan, Digital Signal Processing – Implementations using DSP Microprocessors with Examples from TMS320C54xx, Cengage Learning India Private Limited, Delhi 2012
2. RulphChassaing and Donald Reay, Digital Signal Processing and Applications with the TMS320C6713 and TMS320C6416 DSK, Second Edition, Wiley India (P) Ltd, New Delhi, 2008

REFERENCES

1. B.Venkataramani and M.Bhaskar, “Digital Signal Processors – Architecture, Programming and Applications”, Tata McGraw – Hill Publishing Company Limited. New Delhi, 2003.
2. TMS320C5416/6713 DSK user manual at https://www.ti.com