CMR358 Computer Architecture and Organization Syllabus:
CMR358 Computer Architecture and Organization Syllabus – Anna University Regulation 2021
COURSE OBJECTIVES
1. To introduce the relevance of this course to the existing technology through demonstrations, case studies, simulations, contributions of scientist, national/international policies with a futuristic vision along with socio-economic impact and issues
2. To study the general purpose architecture for computer system.
3. To study the design of data path unit and control unit for ALU operation.
4. Understanding the concept of various memories.
5. To introduce the concept of interfacing and organization of multiple processors
UNIT – I INTRODUCTION
Computing and Computers, Evolution of Computers, VLSI Era, System Design- Register Level, Processor Level, CPU Organization, Data Representation, Fixed – Point Numbers, Floating Point Numbers, Instruction Formats, Instruction Types. Addressing modes.
UNIT – II DATA PATH DESIGN
Fixed Point Arithmetic, Addition, Subtraction, Multiplication and Division, Combinational and Sequential ALUs, Carry look ahead adder, Robertson algorithm, booth‘s algorithm, nonrestoring division algorithm, Floating Point Arithmetic, Coprocessor, Pipeline Processing, Pipeline Design, Modified booth‘s Algorithm.
UNIT – III CONTROL DESIGN
Hardwired Control, Micro programmed Control, Multiplier Control Unit, CPU Control Unit, Pipeline Control, Instruction Pipelines, Pipeline Performance, Superscalar Processing, Nano Programming.
UNIT – IV MEMORY ORGANIZATION
Random Access Memories, Serial – Access Memories, RAM Interfaces, Magnetic Surface Recording, Optical Memories, multilevel memories, Cache & Virtual Memory, Memory Allocation, Associative Memory.
UNIT – V SYSTEM ORGANIZATION
Communication methods, Buses, Bus Control, Bus Interfacing, Bus arbitration, IO and system control, IO interface circuits, Handshaking, DMA and interrupts, vectored interrupts, PCI interrupts, pipeline interrupts, IOP organization, operation systems, multiprocessors, fault tolerance, RISC and CISC processors, Superscalar and vector processor
TOTAL: 45 PERIODS
COURSE OUTCOMES
At the end of the course students able to
CO1: Comprehend and appreciate the significance and role of this course in the present contemporary world
CO2: Describe data representation, instruction formats and the operation of a digital computer.
CO3: Illustrate the data path unit and control unit for ALU operation.
CO4: Discuss about implementation schemes of control unit and pipeline performance.
CO5: Explain the concept of various memories, interfacing and organization of multiple processors and Discuss about the interrupts, I/Os and other components of the system.
TEXT BOOKS:
1. John P. Hayes,, “Computer architecture and Organization”, Tata McGraw-Hill, 3 rd Edition, 1998.
2. V. Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, “Computer Organisation”, 5th Edition, McGraw-Hill Inc, 1996.
REFERENCES:
1. Morris Mano, “Computer System Architecture”, Prentice-Hall ofIndia, 2000.
2. Behrooz Paraami, “Computer Architecture, From Microprocessor to Supercomputers”, Oxford University Press, Sixth impression, 2010.
3. P. PalChaudhuri, “Computer organization and design”, Prentice Hall of India, 2 nd Edition, 2007.
4. Miles J. Murdocca and Vincent P. Heuring, “Principles of Computer Architecture”, Prentice Hall, 2000.
5. William Stallings, “Computer Organization and Architecture, Designing for Performance”, Pearson Education, 8th Edition, 2010.