CEI355 Computer Architecture Syllabus:
CEI355 Computer Architecture Syllabus – Anna University Regulation 2021
COURSE OBJECTIVES:
1. To learn the basic structure and operations of a computer
2. To learn the arithmetic and logic unit and implementation of fixed-point and floating point arithmetic unit
3. To learn the basics of pipelined execution
4. To understand parallelism and multi-core processors
5. To understand the memory hierarchies, cache memories and virtual memories
6. To learn the different ways of communication with I/O devices
UNIT I BASIC STRUCTURE OF A COMPUTER SYSTEM
Functional Units – Basic Operational Concepts – Performance – Instructions: Language of the Computer – Operations, Operands – Instruction representation – Logical operations – decision making – MIPS Addressing.
UNIT II ARITHMETIC FOR COMPUTERS
Addition and Subtraction – Multiplication – Division – Floating Point Representation – Floating Point Operations – Subword Parallelism
UNIT III PROCESSOR AND CONTROL UNIT
A Basic MIPS implementation – Building a Datapath – Control Implementation Scheme – Pipelining – Pipelined datapath and control – Handling Data Hazards & Control Hazards – Exceptions.
UNIT IV PARALLELISIM
Parallel processing challenges – Flynn‘s classification – SISD, MIMD, SIMD, SPMD, and Vector Architectures – Hardware multithreading – Multi-core processors and other Shared Memory Multiprocessors – Introduction to Graphics Processing Units, Clusters, Warehouse Scale Computers and other Message-Passing Multiprocessors.
UNIT V MEMORY & I/O SYSTEMS
Memory Hierarchy – memory technologies – cache memory – measuring and improving cache performance – virtual memory, TLB‘s – Accessing I/O Devices – Interrupts – Direct Memory Access – Bus structure – Bus operation – Arbitration – Interface circuits – USB.
TOTAL: 45 PERIODS
SKILL DEVELOPMENT ACTIVITIES (Group Seminar/Mini Project/Assignment/Content Preparation / Quiz/ Surprise Test / Solving GATE questions/ etc)
1 Fundamentals of computer architecture
2 Basic arithmetical operations
3 Organization of computer system
4 Analysis of challenges parallel processing
5 Interfacing and storage systems in the computer
COURSE OUTCOMES:
Students able to
CO1 Understand the basics structure of computers, operations and instructions.
CO2 Design arithmetic and logic unit.
CO3 Understand pipelined execution and design control unit.
CO4 Understand parallel processing architectures.
CO5 Understand the various memory systems and I/O communication.
TEXT BOOKS:
1. David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Fifth Edition, Morgan Kaufmann / Elsevier, 2014.
2. Carl Hamacher, Zvonko Vranesic, Safwat Zaky and Naraig Manjikian, Computer Organization and Embedded Systems, Sixth Edition, Tata McGraw Hill, 2012.
REFERENCES:
1. William Stallings, Computer Organization and Architecture – Designing for Performance, Eighth Edition, Pearson Education, 2010.
2. John P. Hayes, Computer Architecture and Organization, Third Edition, Tata McGraw Hill, 2012.
3. John L. Hennessey and David A. Patterson, Computer Architecture – A Quantitative Approach‖, Morgan Kaufmann / Elsevier Publishers, Fifth Edition, 2012.