CEI349 Digital VLSI Syllabus:
CEI349 Digital VLSI Syllabus – Anna University Regulation 2021
COURSE OBJECTIVES:
1. TolearnthefundamentalsofVLSIdesign
2. TofamiliarizewithVLSIcombinational logiccircuitsdesign
3. TofamiliarizewithVLSIsequential logiccircuits design
4. Tolearnthevariousarithmeticcircuits andtestingmethodologies
5. TofamiliarizewiththedifferentFPGAarchitectures
UNIT I MOS TRANSISTOR PRINCIPLES
MOS Technology and VLSI, Pass transistors, NMOS, CMOS Fabrication process and Electrical properties of CMOS circuits and Device modelling. Characteristics of CMOS inverter, Scaling principles and fundamental limits. Propagation Delays, CMOS inverter scaling, Stick diagram, Layout diagrams, Elmore‘s constant, Logical Effort. Case study: Study of technology development in MOS
UNIT II COMBINATIONAL LOGIC CIRCUITS
Static CMOS logic Design, Design techniques to improve the speed, power dissipation of CMOS logic, low power circuit techniques, Ratioed logic, Pass transistor Logic, Transmission CPL,DCVSL, Dynamic CMOS logic, Domino logic, Dual Rail logic, NP CMOS logic and NORA logic
UNIT III SEQUENTIAL LOGIC CIRCUITS
Static and Dynamic Latches and Registers, Timing Issues, Pipelines, Clocking strategies, Memory Architectures, and Memory control circuits.
UNIT IV DESIGNING ARITHMETIC BUILDING BLOCKS & TESTING
Data path circuits, Architectures for Adders, Accumulators, Multipliers, Barrel Shifters, Need for testingManufacturing test principles- Design for testability. Case study: Analysis of area, power and delay for 16 bit adder and 8 bit multiplier.
UNIT V IMPLEMENTATION STRATEGIES
Full Custom and Semicustom Design, Standard Cell design and cell libraries, FPGA building block architectures, FPGA interconnect routing procedures. Demo: Complete ASIC flow using Backend tool and fabrication flow Overall case study: Development of IC in commercial aspects (design, testing and fabrication cost)
TOTAL 45 PERIODS
SKILL DEVELOPMENT ACTIVITIES (Group Seminar/Mini Project/Assignment/Content Preparation / Quiz/ Surprise Test / Solving GATE questions/ etc)
1 Interpretation of Data Sheet of transistors and ICs with respect to their Static and Dynamic Characteristics.
2 Familiarization of any one relevant software tool (MATLAB/ SCILAB/ LABVIEW/ Proteus/ Equivalent open source software)
3 Design and verification of simple signal conditioning circuit thro simulation.
4 Realization of signal conditioning circuit in hardware Introduction to other advanced logic circuits not covered in the above syllabus
COURSE OUTCOMES:
CO1 Relate characteristics and realize modeling of MOS transistors.
CO2 Explain the design combinational logic using various logic styles, satisfying static and dynamic requirements
CO3 Apply timing issues of sequential logic and design memories.
CO4 Analyse and design data path elements
CO5 Build FPGA architecture and interconnect methodology
TEXT BOOKS:
1. Jan Rabaey, Anantha Chandrakasan, B.Nikolic, “Digital Integrated circuits: A Design Perspective”, Prentice Hall of India, 2nd Edition, 2003.
2. N.Weste, K.Eshraghian, “Principles of CMOS VLSI DESIGN”, A system Perspective, 2nd Edition, Addision Wesley, 2004.
REFERENCES:
1. A.Pucknell, Kamran Eshraghian, “BASIC VLSI DESIGN”, Prentice Hall of India, 3rd Edition, 2007.
2. M.J. Smith, “Application Specific Integrated Circuits”, Addisson Wesley, 1997.
3. R.Jacob Baker, Harry W.LI., David E.Boyee, “CMOS Circuit Design, Layout and Simulation”, Prentice Hall of India, 2005.