CS25C06 Digital Principles and Computer Organization Syllabus:

CS25C06 Digital Principles and Computer Organization Syllabus – Anna University UG Syllabus Regulation 2025

Course Objective:

• To impart knowledge on digital logic and provide functional concepts of computer systems with necessary illustrations.

Digital Logic: Digital Systems, Integer Arithmetic, Addition and Subtraction of Signed Numbers, Boolean Algebra, Theorems and Postulates, Functions, Truth Table, Canonical and Standard Forms, Simplification using K-Maps, Digital Logic Gates, Universal gates, Implementation of Logic Gates, Integrated Circuits.
Activities:
• Assignment on Karnaugh Map.
• Build logic circuits.
• Virtual demonstration of logical gates.

Computer System: Basic structure of a computer, Classes of Computer, Functional units – Interconnection of components, Von Neumann architecture and Harvard architecture – Instruction execution cycle, Performance metrics: MIPS, MFLOPS, CPI, throughput.
Activities:
• MIPS, MFLOPS, and CPI calculations.
• Preparations of report on comparison of two CPU from different manufacturing.

Arithmetic and Logic Unit: Combinational Circuits: Adders, Binary Adder, Binary Parallel Adder, Subtractor, Multiplexers, Decoders, Design of Fast Adder, Multiplication of Signed and Unsigned Numbers, Fast Multiplication – Integer Division, Floating Point Numbers and Operations, Booth’s algorithm for signed multiplication, Sequential Circuits: Flip-Flops, Registers, Counters.
Activities:
• Virtual demonstration on Binary adder.
• Build a parallel order.

Processing and Pipelining: Instruction Set Architecture: RISC vs CISC, Addressing modes, Hardwired control and Micro programmed control unit, Concepts of Pipelining, Pipeline stages and Timing diagram, Hazards: Structural, Data and Control Hazards, Instruction-level parallelism, Parallel processing concepts: SIMD, MIMD, Superscalar processors, Vector and Array Processor.
Activities:
• Comparison of RISC-V and x86 ISAs; present findings on their relevance to AI accelerators.
• Spot and resolve different types of pipeline hazards in given scenarios.

Memory: Memory hierarchy: Registers, Cache, Main Memory- RAM- ROM: PROM, EPROM, EEPROM-Secondary storage, HDD, SSD, Cache Organization, Cache replacement policies, NUMA- DMA- ECC.
I/O Systems
I/O Techniques: Programmed, Interrupt-Driven, DMA, I/O Devices and Interface Standards: PCI, USB, SATA, Interrupt Types and Priority Handling, Buses and Bus Arbitration, Peripheral Communication.
Activities:
● Virtual demonstration of DMA.
● I/O in Real AI Systems.

Weightage: Continuous Assessment: 40%, End Semester Examinations: 60%

Assessment Methodology: Quiz (5%), Assignments (10%), Flipped Classroom (5%), Project (20%), Review of GATE questions (10%) & Internal Assessment (50%).

References:

1. Mano, M. M., & Ciletti, M. D. (2018). Digital design: With an introduction to the Verilog HDL, VHDL, and System Verilog. Pearson.
2. Patterson, D. A., & Hennessy, J. L. (2012). Computer organization and design: The hardware/software interface. Morgan Kaufmann.
3. Stallings, W. (2015). Computer organization and architecture: Designing for performance. Pearson.

E resources/E materials:

1. NPTEL Courses (Indian MOOCs – Free & Government Certified):
a. Computer Architecture: Computer Architecture – Course
b. Computer Architecture and Organization: Computer Architecture and Organization – Course
2. Digital Circuit Simulator: CircuitVerse – Online Digital Logic Circuit Simulator
3. Cloud environment: https://www.cloudbus.org/cloudsim/